• MTSS: Multi Task Stack Sharing for Embedded Systems
  Bhuvan Middha, Matthew Simpson and Rajeev Barua
  To appear in the ACM Transactions on Embedded Computing Systems (TECS).

• Memory Allocation for Embedded Systems with a Compile-Time-Unknown Scratch-Pad Size.
  Nghi Nguyen, Angel Dominguez, and Rajeev Barua.
  To appear in the ACM Transactions on Embedded Computing Systems (TECS).

• Memory Overflow Protection for Embedded Systems using Run-time Checks, Reuse and Compression.
  by Surupa Biswas, Thomas Carley, Matthew Simpson, Bhuvan Middha and Rajeev Barua.
  In ACM Transactions on Embedded Computing Systems (TECS), 5(4), pp 719 - 752, Nov 2006.
• Dynamic Allocation for Scratch-Pad Memory using Compile-Time Decisions.
  by Sumesh Udayakumaran, Angel Dominguez and Rajeev Barua.
  In ACM Transactions on Embedded Computing Systems (TECS), 5(2), pp 472-511, May 2006.
• Heap Data Allocation to Scratch-Pad Memory in Embedded Systems.
  by Angel Dominguez, Sumesh Udayakumaran and Rajeev Barua.
  In Journal of Embedded Computing, Vol 1, Number 4, pp 521-540, 2005, IOS Press, Amsterdam, The Netherlands.
• Reducing Code Size in VLIW Instruction Scheduling.
  by Steve Haga, Yi Zhang, Andrew Webber and Rajeev Barua.
  In Journal of Embedded Computing, Volume 1, Number 3, 2005, IOS Press, Amsterdam, The Netherlands.
• Dynamic Functional Unit Assignment for Low Power
  by Steve Haga, Natasha Reeves, Rajeev Barua and Diana Marculescu.
  In Journal of Supercomputing, 31(1), pp 47-62, Kluwer Academic Publishers, January 2005.
• Execution History Guided Instruction Prefetching
  by Zhang Yi, Steve Haga and Rajeev Barua.  
  In Journal of Supercomputing, 27(2), pp 129-147, February 2004.  Kluwer Academic Publishers.
• An Optimal Memory Allocation Scheme for Scratch-Pad Based Embedded Systems
  by O. Avissar, R. Barua and D. Stewart.
  In ACM Transactions on Embedded Computing Systems (TECS), 1(1), pp. 6-26, November 2002.
• Compiler Support for Scalable and Efficient Memory Systems, 
R. Barua, W. Lee, S. Amarasinghe and A. Agarwal.
IEEE Transactions on Computers, Special Issue on Memory Systems, Nov 2001.
• Baring it all to the software. 
  by Elliot Waingold, Michael Taylor, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Srikrishna Devabhaktuni, Rajeev Barua, Jonathan Babb, Saman Amarasinghe, and Anant Agarwal 
  IEEE Computer, September 1997, pp. 86-93. 

Refereed Conferences: 

• Scratch-Pad Memory Allocation without Compiler Supports for Java Applications
  By Nghi Nguyen, Angel Dominguez and Rajeev Barua.
  In Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Salzburg, Austria, October 1-3, 2007. (10 pages)

• Recursive Function Allocation to Scratch-Pad Memory for Embedded Systems
  By Angel Dominguez, Nghi Nguyen and Rajeev Barua.
  In Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Salzburg, Austria, October 1-3, 2007. (10 pages)

• An Integrated Scratch-Pad Allocator for Affine and Non-affine Codes.
  By Sumesh Udayakumaran and Rajeev Barua.
  In Proceedings of International Conference on Design, Automation and Test in Europe (DATE), Munich, Germany, March 6-10, 2006. (6 pages)
• Segment Protection for Embedded Systems Using Run-time Checks
  By Matthew Simpson, Bhuvan Middha and Rajeev Barua.
  Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), San Francisco, CA, September 25-27, 2005.
• Memory Allocation for Embedded Systems with a Compile-Time-Unknown Scratch-Pad Size.
  By Nghi Nguyen, Angel Dominguez and Rajeev Barua.
  Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), San Francisco, CA, September 25-27, 2005.
• MTSS: Multi Task Stack Sharing for Embedded Systems.
  By Bhuvan Middha, Matthew Simpson and Rajeev Barua.
  Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), San Francisco, CA, September 25-27, 2005.
• Memory Overflow Protection for Embedded Systems using Run-time Checks, Reuse and Compression
  By Surupa Biswas, Matthew Simpson and Rajeev Barua.
  Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems(CASES), Washington, DC, September 23-25, 2004.
• Contention-Free Periodic Task Scheduler Medium Access Control in Wireless Sensor / Actuator Networks. 
  By Tom Carley, Musa Ba, Rajeev Barua and Dave Stewart. 
  Proceedings of The 24th IEEE Real-Time Systems Symposium (RTSS), Cancun, Mexico, December 3-5, 2003.
• Compiler-Decided Dynamic Memory Allocation for Scratch-Pad Based Embedded Systems. 
  By Sumesh Udayakumaran and Rajeev Barua. 
  Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems(CASES), San Jose, CA, October 30-November 1, 2003.
• Dynamic Functional Unit Assignment for Low Power. 
  By S. Haga, N. Reeves and R. Barua.
  Proceedings of International Conference on Design, Automation and Test in Europe (DATE), Munich, Germany, March 3-7, 2003.
• Execution History Guided Instruction Prefetching.
by Zhang Yi, Steve Haga and Rajeev Barua.
Proceedings of the Sixteenth ACM Int'l Conference on Supercomputing (ICS), New York City, NY, June, 2002.
• Compiler-directed Customization of ASIP Cores.
by T.V.K Gupta, Roberto Ko and Rajeev Barua.
Proceedings of Tenth ACM/IEEE Int'l Symposium on Hardware/Software Codesign (CODES), Estes Park, CO, May, 2002.
• Heterogeneous Memory Management for Embedded Systems,
O. Avissar, R. Barua and D. Stewart.
Proceedings of the ACM 2nd Int'l Conf. on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), Atlanta, GA, November 2001.
• Maps: A Compiler-Managed Memory System for Raw Machines,
by Rajeev Barua, Walter Lee, Saman Amarasinghe and Anant Agarwal. 
Proceedings of the Twenty-Sixth International Symposium on Computer Architecture (ISCA), Atlanta, GA, June, 1999. pp 4-15.
• Memory Bank Disambiguation using Modulo Unrolling for Raw Machines,
by Rajeev Barua, Walter Lee, Saman Amarasinghe and Anant Agarwal. 
Proceedings of the ACM/IEEE Fifth International Conference on High-Performance Computing (HiPC), December, 1998. pp 212-220.
• Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine,
by W. Lee, R. Barua, D. Srikrishna, J. Babb, V. Sarkar, and S. Amarasinghe. 
Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems(ASPLOS), San Jose, CA, October, 1998. pp 46-57.
• Parallelizing Applications into Silicon
by Jonathan Babb, Martin Rinard, Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, and Saman Amarasinghe 
Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines '99 (FCCM '99), Napa Valley,                   CA, April 1999, pp 70-80.
• The Raw Compiler Project,
by Anant Agarwal, Saman Amarasinghe, Rajeev Barua, Matthew Frank, Walter Lee, Vivek Sarkar, Devabhaktuni Srikrishna and Michael Taylor. 
Proceedings of the Second SUIF compiler workshop, Stanford, CA, August 21-23, 1997. 
• The RAW Benchmark Suite: Computation Structures for General Purpose Computing,
by Jonathan Babb, Matthew Frank, Elliot Waingold, Rajeev Barua, Michael Taylor, Jang Kim, Srikrishna Devabhaktuni, Peter Finch, and Anant Agarwal 
Proceedings of the  IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM) , Napa Valley, CA, April 1997, pp 134-144.
• The Sensitivity of Communication Mechanisms to Bandwidth and Latency,
by Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John D. Kubiatowitz, and Anant Agarwal. 
Proceedings of 4th Int'l Symposium on High Performance Computer Architecture (HPCA), Las Vegas, NV, Feb 1-4, 1998. 
• Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed-Memory Multiprocessors,
by Rajeev Barua, David Kranz and Anant Agarwal. 
Proceedings of Symposium on Languages and Compilers for Parallel Computing (LCPC), August 1996. Springer Verlag, Berlin, Germany.

Refereed Workshops: 

• EPIC Instruction Scheduling Based on Optimal Approaches.
by Steve Haga and Rajeev Barua.
1st Annual Workshop on Explicitly Parallel Instruction Computing Architectures and Compiler Technology (EPIC), Austin, TX, December, 2001.

 
• Analysis of Compression Algorithms for Program Data
  by Matthew Simpson, Surupa Biswas and Rajeev Barua.
  Technical report, University of Maryland, College Park, MD. August 2003.
• Addressing Partitioned Arrays in Distributed Memory Multiprocessors - the Software Virtual Memory Approach.

Rajeev Barua, David Kranz and Anant Agarwal. 
Proceedings of the MIT Student Workshop, Wellesley, MA, July 1995. 
( two-page workshop version) 

• Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors.
by Anant Agarwal, David Kranz, Rajeev Barua and Venkat Natarajan. 
Chapter 9, Compiler Optimizations for Scalable Parallel Systems -- Languages, Compilation Techniques and Runtime Systems, LNCS Series 1808, Springer-Verlag, Berlin, Germany, 2001.
• Dynamic Functional Unit Assignment for Low Power. 
  By S. Haga, N. Reeves and R. Barua. 
  In Embedded Software for SoCs, Kluwer Academic Publishers, Dordrecht, The Netherlands, 2003.

My Theses:

• Maps: A Compiler-Managed Memory System for Software-Exposed Architectures.
by Rajeev Barua, Ph.D thesis, MIT Laboratory for Computer Science, Jan 2000.  Available as Technical Report MIT-LCS-TR-799.
• Global Partitioning of Parallel Loops and Data for Caches and Distributed Memory in Multiprocessors.
by Rajeev Barua. 
Masters Thesis, MIT Laboratory for Computer Science, May 1994. MIT-LCS-TR-630. 
Also appears in MIT student workshop, Cape Cod, July 1994. 
( two-page workshop version ) 

Selected student theses:  (This is a VERY IMCOMPLETE LIST!!)

• Heap data allocation to Scratch-Pad Memory in Embedded Systems.
by Angel Dominguez, Ph.D thesis, University of Maryland, Department of Electrical and Computer Engineering, Feb 2007.
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